1. Field of the Invention
This invention relates to a power source voltage monitoring circuit having a comparator which monitors its power source voltage.
2. Description of Related Art
The configuration of the conventional power source voltage monitoring circuit is explained by referring to FIG. 5. The power source voltage monitoring circuit 200 monitors the potential of the power source, that is, the power source voltage Vcc, detects whether or not the power source voltage Vcc decreases under a predetermined value, and outputs the result of the detection. The power source voltage monitoring circuit 200 has a reference voltage circuit 1. The reference voltage circuit 1 generates a reference voltage, and supplies it to one of the input terminals of a comparator 2. The reference voltage Vcc is divided by sense resistors R1 and R2. The divided voltage is supplied to the other input terminal of the comparator 2.
When the power source voltage Vcc is increased from 0V, the changes of the voltage at nodes a, b and c in FIG. 5 are explained by referring to FIG. 6. At t0, the power source voltage Vcc starts increasing from 0V. The power source voltage Vcc increases proportionally to time. The increase of the power source voltage Vcc allows the reference voltage circuit 1 to start initiating. Then, the voltage Va, which represents the output at node a, increases proportionally to time. At t1, the power source voltage Vcc reaches the startup voltage of the reference voltage circuit 1, allowing the voltage Va to surge and then maintain itself at a constant reference voltage value.
Vb is the voltage at node b between the sense resistors R1 and R2 which divide the power source voltage Vcc. The increase of the power source voltage Vcc allows the voltage Vb to increase proportionally to time. The inclination of the voltage Vb is larger than the initial inclination of the voltage Va output from the reference voltage circuit 1.
Vc at node c is the output voltage of the comparator 2. In the initial phase, although the voltage Vb is lower than the reference voltage, the voltage Vc represents the same value as the power source voltage Vcc, because the voltage Vb is higher than the voltage Va.
Since the inclination of the output voltage Va becomes larger than the inclination of the voltage Vb after t1, the output voltage Va exceeds the voltage Vb at t2. When the voltage Va exceeds the voltage Vb, both of which are supplied to the comparator 2, the output voltage of the comparator 2, Vc, is 0V.
After t2, the output voltage Va from the reference voltage circuit 1 reaches a predetermined reference voltage and then becomes constant. The voltage Vb at node b continuously increases proportional to the increase of the power source voltage Vcc, so that the voltage Vb exceeds the voltage Va again at t3. When the voltage Vb exceeds the voltage Va, the output voltage of the comparator 2, Vc, recovers from 0V to the same voltage as Vcc.
Subsequently, the voltage Vb proportionally increases similarly to the case of Vcc before t4 that is the time when the power source voltage Vcc reaches the desired voltage. In addition, the voltage Va still maintains itself at the reference voltage. After t4, the power source voltage Vcc reaches the desired voltage and becomes constant, similarly, the voltage Vb that is the voltage at node b dividing the power source voltage Vcc becomes constant. After t4, the output voltage of the comparator 2, Vc, becomes the same voltage as the power source voltage Vcc.
Assuming that the power source voltage Vcc decreases at t5, the divided voltage Vb also decreases and may decrease under the reference voltage Va. In this case, the voltage Vc, which represents the result of the comparison, becomes 0V after t6 if the voltage Vb is lower than the reference voltage Va. In this example, the voltage Vc is 0V during t6 to t7, then, the voltage Vc may start following Vcc again at t7 that is the time when the voltage Vb is higher than the voltage Va. During t6 to t7, it is a normal operation that the comparator 2 outputs 0V, accordingly, such the operation enables the power source voltage to be monitored.
In power on reset circuits (Japanese Unexamined Patent Application Publication No. H9-135157), the circuit for detecting the power source voltage is employed. This configuration of the power source voltage monitoring circuit, however, is not for detecting the decrease of the power source voltage, but for detecting that the power source voltage reaches a predetermined value and resetting the circuit.
In the conventional power source voltage monitoring circuit, during t0 to t2, the output voltage of the comparator 2, Vc, is the same voltage as the power source voltage Vcc, which is high level, while the voltage Vb is lower than the reference voltage, which causes a misoperation. The misoperation of the comparator 2 causes the misoperation of other circuits which operate depending on the output of the comparator 2.